1. Field of the Invention
The present invention relates to a switching regulator control circuit including a soft start circuit, and more particularly to a switching regulator control circuit capable of performing stable power supply at start-up without discharging charges from an output capacitor at the time of turning on a power source by limiting a duty of an internal oscillating frequency at the time of turning on the power. The present invention also relates to a switching regulator controlled by the synchronous rectifying type switching regulator control circuit and to a semiconductor integrated circuit having the synchronous rectifying type switching regulator control circuit.
2. Description of the Related Art
A switching regulator control circuit that performs oscillating operation until an output voltage reaches a desirable voltage without a limitation on a duty of an oscillating frequency at the time of turning on a power source as shown in a circuit diagram of FIG. 3 has been known as a conventional synchronous rectifying type switching regulator control circuit including a soft start circuit.
Hereinafter, the conventional synchronous rectifying type switching regulator control circuit including the soft start circuit will be described with reference to FIG. 3. First, a voltage level Vout is detected. A difference between a voltage level Va produced by resistive division of divisional resistors 100 and 101 and a voltage level Vref outputted from a reference voltage circuit 106 is amplified by an error amplifying circuit 102 and outputted therefrom as a voltage level Verr. Then, the outputted voltage level Verr and a triangular wave Vosc outputted from an oscillating circuit 104 are compared with each other by a comparing circuit 103 and an voltage level Vcomp is outputted therefrom. In response to the voltage level Vcom, pulses PDRV and NDRV for controlling external switches are outputted from a synchronous rectifying circuit 105 such that a Vout terminal voltage becomes a desirable constant output voltage. The pulses PDRV and NDRV for controlling the external switches are generated at an internal oscillating frequency Vosc and controlled by changing a duty ratio thereof such that the Vout terminal voltage becomes the desirable constant output voltage.
As a specific example of a soft start method which has been known up to now, there is a method of performing soft start using an external capacitor (for example, see JP 08-317637 A (page 2)). When the power source is turned on, an external soft start capacitor 108 is charged at constant current by a soft start circuit 107. Therefore, a potential of the external soft start capacitor 108 gradually rises at the time of turning on the power source. In addition, the voltage level Vref outputted from the reference voltage circuit 106 gradually rises at the time of turning on the power source in proportion to a rise in capacitance of the external soft start capacitor 108. As a result, in the example of the conventional synchronous rectifying type switching regulator control circuit including the soft start circuit, when the voltage level Vref outputted from the reference voltage circuit 106 gradually rises at the time of turning on the power source, a duty of each of the pulses PDRV and NDRV gradually increases from a duty of 0%, so that the Vout terminal voltage gradually rises at the time of turning on the power source. Thus, the power source can be tuned on without causing a rush current to flow between an input power source and an output voltage terminal, so that it is easy to obtain stable power supply without a load on the input power source.
However, in the conventional synchronous rectifying type switching regulator control circuit including the soft start circuit, when any charges are accumulated to same extent in the output capacitor at the time of turning on the power source, there is a case where a voltage difference between an input voltage and an output voltage is small. Here, assume that a state in which the voltage difference between the input and output voltages is small and a duty is low continues. In such a state, although a switch connected between an input terminal and a coil is being turned ON in response to the pulse PDRV, there is no case where a current flows into the coil connected between the input and output terminals. Therefore, when a switch connected between the coil and a VSS terminal is turned ON in response to the pulse NDRV at next timing because the current does not flow between the input and output terminals, a current flows between the output terminal and the VSS terminal through the coil. Thus, there is a problem in that the charges accumulated for outputting flows into the VSS terminal.